Silicon Labs /SiM3_NRND /SIM3C167_B /CLKCTRL_0 /CONTROL

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Interpret as CONTROL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LPOSC0)AHBSEL 0 (DIV1)AHBDIV 0 (DIV1)APBDIV 0 (BOTH_EDGES)EXTESEL 0 (NOT_SET)OBUSYF

AHBDIV=DIV1, AHBSEL=LPOSC0, EXTESEL=BOTH_EDGES, OBUSYF=NOT_SET, APBDIV=DIV1

Description

Module Control

Fields

AHBSEL

AHB Clock Source Select.

0 (LPOSC0): AHB clock source is the Low-Power Oscillator.

1 (LFOSC0): AHB clock source is the Low-Frequency Oscillator.

2 (RTC0OSC): AHB clock source is the RTC Oscillator.

3 (EXTOSC0): AHB clock source is the External Oscillator.

5 (PLL0OSC): AHB clock source is the PLL.

6 (LPOSC0_DIV): AHB clock source is a divided version of the Low-Power Oscillator.

AHBDIV

AHB Clock Divider.

0 (DIV1): AHB clock divided by 1.

1 (DIV2): AHB clock divided by 2.

2 (DIV4): AHB clock divided by 4.

3 (DIV8): AHB clock divided by 8.

4 (DIV16): AHB clock divided by 16.

5 (DIV32): AHB clock divided by 32.

6 (DIV64): AHB clock divided by 64.

7 (DIV128): AHB clock divided by 128.

APBDIV

APB Clock Divider.

0 (DIV1): APB clock is the same as the AHB clock (divided by 1).

1 (DIV2): APB clock is the AHB clock divided by 2.

EXTESEL

External Clock Edge Select.

0 (BOTH_EDGES): External clock generated by both rising and falling edges of the external oscillator.

1 (RISING_ONLY): External clock generated by only rising edges of the external oscillator.

OBUSYF

Oscillators Busy Flag.

0 (NOT_SET): AHB and APB oscillators are not busy.

1 (SET): AHB and APB oscillators are busy and the AHBSEL, AHBDIV, and APBDIV fields should not be modified.

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